Topics in High-Performance and Scientific Computing
- Winter semester 2014-15.
- CAMPUS #: 14ws-29563
-
Lectures begin: Thursday, 23 October 2014, 5.15pm.
Lectures: Thursdays, 5.15pm (schedule to be decided)
Rogowski 115 - AICES seminar room (Schinkelstrasse 2)
Topics
Accelerators & alternative hardware: Xeon Phi, GPUs, FPGAs, Arm, ...
Corresponding languages: OpenCL, Cuda, OpenACC, HDL, Verilog, ...
Presentations
40mins + questions
"HOWTO: Presentations", by P. Bientinesi [PDF]
Report
Template: [template.tex]
Page limit, format, ... -> see the [template]
Deadline: 12.02.2015, 5pm.
Topic Assignment
| # | Team | Topic | Presentation |
|---|---|---|---|
| A1 | Christian Steinhaus, Christian Wedding | ARM - odd dwarfs | Intro, Slides |
| A2 | Patric Mai, Pierre Schoonbrood | Arm - even dwarfs | Intro, Slides |
| X1 | Thomas Lange, Kai Neumann | Xeon Phi - odd dwarfs | Intro, Slides |
| X2 | Philipp Bartels, Eugen Seljutin | Xeon Phi - even dwarfs | Intro, Slides |
| F1 | Arne Döring, Daniele Mele | FPGA - odd dwarfs | Intro, Slides1, Slides2 |
| F2 | Hongrui Deng, Jens Hahne | FPGA - even dwarfs | Intro, Slides |
| N1 | Marcus Völker, Julian Naß | Nvidia GPU - odd dwarfs | Intro, Slides |
| N2 | Yang Zhang, Wang Haiqing | Nvidia GPU - even dwarfs | Intro, Slides |
| G | Ying Li, Jasper Manousek | AMD GPU - all dwarfs | Slides |
| V | Jawahar Diwahar, Borah Deepjyoti | Verilog, VHDL | Slides |
Dwarfs
[link]| Odd dwarfs | Even dwarfs |
|---|---|
| 1) Dense Linear Algebra | 2) Sparse Linear Algebra |
| 3) Spectral Methods | 4) N-Body Methods |
| 5) Structured Grids | 6) Unstructured Grids |
| 7) MapReduce | 8) Combinational Logic |
| 9) Graph Traversal | 10) Dynamic Programming |
| 11) Backtrack and Branch-and-Bound | 12) Graphical Models |
| 13) Finite State Machines | - |
Schedule
- 23.10.2014: Topic assignment; semester schedule.
-
20.11.2014: First review.
The meetings take place in my office: Room 432, AICES, Rogowski.
4.45pm: Team N2
5.00pm: Team A1
5.10pm: Team A2
5.20pm: Team X1
5.30pm: Team X2
5.40pm: Team F1
6.00pm: Team F2
6.10pm: Team N1
6.30pm: Team G
6.40pm: Team V
- 11.12.2014, 5pm: Deadline for submitting the list of papers.
- 16.01.2015: Deadline to meet for the second review.
-
22.01.2015, 5.15pm
- Team Xeon Phi 1
- Team Xeon Phi 2
- Team Verilog
-
29.01.2015, 5.15pm: 3 or 4 presentations (2/3)
- Team FPGA 1
- Team FPGA 2
- Team Arm 1
- Team Arm 2
-
05.02.2015, 5.15pm
- Team Nvidia GPU 1
- Team Nvidia GPU 2
- Team AMD GPU
- 12.02.2015, 5pm: Deadline for submitting the presentation and the final report.